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| SPC11A SP 12KB Sound Controller Preliminary JUL. 09, 2001 Version 0.1 SUNPLUS TECHNOLOGY CO. reserves the right to change this documentation without prior notice. Information provided by SUNPLUS TECHNOLOGY CO. is believed to be accurate and reliable. However, SUNPLUS TECHNOLOGY CO. makes no warranty for any errors which may appear in this document. No responsibility is assumed by Contact SUNPLUS TECHNOLOGY CO. to obtain the latest version of device specifications before placing your order. SUNPLUS TECHNOLOGY CO. for any infringement of patent or other rights of third parties which may result from its use. In addition, SUNPLUS products are not authorized for use as critical components in life support devices/ systems or aviation devices/systems, where a malfunction or failure of the product may reasonably be expected to result in significant injury to the user, without the express written approval of Sunplus. Preliminary SPC11A Table of Contents PAGE 1. GENERAL DESCRIPTION.......................................................................................................................................................................... 3 2. BLOCK DIAGRAM ...................................................................................................................................................................................... 3 3. FEATURES.................................................................................................................................................................................................. 3 4. APPLICATION FIELD ................................................................................................................................................................................. 3 5. SIGNAL DESCRIPTIONS* .......................................................................................................................................................................... 4 6. FUNCTIONAL DESCRIPTIONS.................................................................................................................................................................. 5 6.1. CPU ..................................................................................................................................................................................................... 5 6.2. ROM AREA ........................................................................................................................................................................................... 5 6.3. RAM AREA............................................................................................................................................................................................ 5 6.4. MAP OF MEMORY AND I/OS .................................................................................................................................................................... 5 6.5. I/O PORT CONFIGURATION*.................................................................................................................................................................... 5 6.6. POWER SAVING MODE ........................................................................................................................................................................... 5 6.7. LOW VOLTAGE RESET ............................................................................................................................................................................ 6 6.8. TIMER/COUNTER ................................................................................................................................................................................... 6 6.9. SPEECH AND MELODY............................................................................................................................................................................ 7 7. ELECTRICAL SPECIFICATIONS ............................................................................................................................................................... 8 7.1. ABSOLUTE MAXIMUM RATINGS ............................................................................................................................................................... 8 7.2. AC CHARACTERISTICS (TA = 25) ........................................................................................................................................................ 8 7.3. DC CHARACTERISTICS (VDD = 3.0V, TA = 25C) ................................................................................................................................... 8 7.4. DC CHARACTERISTICS (VDD = 5.0V, TA = 25C) ................................................................................................................................... 8 8. APPLICATION CIRCUITS........................................................................................................................................................................... 9 8.1. APPLICATION CIRCUIT ............................................................................................................................................................................ 9 8.2. CURRENT MODE DAC SPEAKER DRIVER .............................................................................................................................................. 10 9. PACKAGE/PAD LOCATIONS ................................................................................................................................................................... 11 9.1. PAD ASSIGNMENT ................................................................................................................................................................................11 9.2. ORDERING INFORMATION ......................................................................................................................................................................11 9.3. PAD LOCATIONS.................................................................................................................................................................................. 12 10. DISCLAIMER............................................................................................................................................................................................. 13 11. REVISION HISTORY ................................................................................................................................................................................. 14 (c) Sunplus Technology Co., Ltd. Proprietary & Confidential 2 JUL. 09, 2001 Preliminary Version: 0.1 Preliminary SPC11A 12KB SOUND CONTROLLER 1. GENERAL DESCRIPTION The SPC11A, a two-channel speech/melody synthesizer, equips an 8-bit CMOS microprocessor with 69 instructions, 12K-byte ROM for speech and melody data (speech compressed by a 4-bit ADPCM with approx. three seconds speech duration @ 6.0KHz sampling rate) and 64-byte working SRAM. and one 8-bit current D/A output. Other primary features include two Timer/Counters, 8 Software Selectable I/Os, In audio processing, melody It operates at a wide ! Supports ROSC only ! Max. CPU clock: 4.0MHz @ 3.0V, 6.0MHz @ 5.0V ! Standby mode (Clock Stop mode) for power savings. Max. 2A @ 5.0V ! 500ns instruction cycle time @ 4.0MHz CPU clock ! Eight general I/Os ! Two 12-bit timer/counters ! Six INT sources ! Key wake -up function ! Approx. 3-sec speech @ 6.0KHz sampling rate with ADPCM ! One D/A output ! Low Voltage Reset and speech can be mixed into one output. 3. FEATURES ! 8-bit microprocessor ! 12K-byte ROM for program and audio data ! 64-byte working SRAM ! Software-based audio processing ! Wide operating voltage: 2.4V - 5.5V @ 4.0MHz 3.6V - 5.5V @ 6.0MHz voltage range of 2.4V - 5.5V with a Low Voltage Reset function that automatically resets CPU when operating voltage is less than 1.3V/2.7V. Plus, a Clock Stop mode is built in for power savings. The The unique power saving mode saves the RAM contents, but freezes the oscillator to stop executing other functions. maximum CPU frequency can run up to 6.0MHz and the instruction cycle is two clock cycles (min.) ~ six clock cycles (max.). The SPC11A loads, not only the latest technology, but also the full commitment and technical support of Sunplus. 2. BLOCK DIAGRAM 4. APPLICATION FIELD Two Timers TimeBase INT control 8-bit microprocessor 12K-byte ROM ! Intelligent education toys Ex. Pattern to voice (animal, car, color, etc.) Spelling (English or Chinese) 64-byte SRAM Two 8-bit D/A (current) ROSC CLK OSC Low Voltage Reset AUD Math ! Advanced toy controller ! General speech synthesizer ! Industrial controller 8 PINS GENERAL I/O PORT IOD7-6,IOD1-0 (I/O) IOC7-6,IOC2-1 (I/O) (c) Sunplus Technology Co., Ltd. Proprietary & Confidential 3 JUL. 09, 2001 Preliminary Version: 0.1 Preliminary SPC11A 5. SIGNAL DESCRIPTIONS* Mnemonic VDD VSS ROSC RESET TEST AUD IOC1 IOC2 IOC6 IOC7 PIN No. 9 10 11 13 12 14 8 7 6 5 Type I I I I I O I/O I/O I/O I/O Power input Ground ROSC Resistor input (Resistor must be connected to VDD) RESET TEST MODE AUDIO OUTPUT Port C is a 4-bit bi-directional programmable Input / Output port with Pull-high or Open-drain option. IOC1: EXT INT IN IOC2: EXT COUNT IN **See note 1 and 2 below. Port D is a 4-bit bi-directional programmable Input / Output port with Pull-low or IOD0 IOD1 IOD6 IOD7 1 2 3 4 I/O I/O I/O I/O Open-drain option. In input mode, Port D can be either Pure or Pull-low states. In output mode, Port D can be either Buffer or Open-drain PMOS type (send current). (Key change, Wake up I/O) **See note 1 and 2 below. In input mode, Port C can be in either Pure or Pull-high states. In output mode, Port C can be a Buffer or Open-drain NMOS type (sink current). Description * Refer to SPC Programming Guide for more information. **Note: 1.) Two input states can be specified: Pure Input, Pull-High or Pull Low. 2.) Three output states can be specified: Buffer output, Open Drain PMOS output (send), or Open Drain NMOS output (sink). (c) Sunplus Technology Co., Ltd. Proprietary & Confidential 4 JUL. 09, 2001 Preliminary Version: 0.1 Preliminary SPC11A 6. FUNCTIONAL DESCRIPTIONS 6.1. CPU The microprocessor in SPC11A is a high performance 8-bit processor equipped Accumulator, Program Counter, X Register, Stack pointer and Processor Status Register (the same as the 6502 instruction structure). The maximum CPU speed of 6.0MHz is capable of bringing you the cleaner speech, pleasant music as well as achieving the best performance. Input/Output IOC port : IOC2 - IOC1 logic_2 control output data V DD 90K 6.2. ROM Area The ROM area in SPC11A is 12K-byte that can be used for program as well as data. buffer or OD-NMOS input data OD : Open Drain 6.3. RAM Area The total RAM size is 64-bytes (including Stack) starting from address $C0 through $FF. Input/Output IOD port : IOD7 - IOD6 input data OD-PMOS or buffer output 6.4. Map of Memory and I/Os *I/O PORT: - PORT IOC IOD $0004 $0005 $00C0 USER RAM and STACK $0100 UNUSED $0400 *INT SOURCE: - INTA (from TIMER A) - INTB (from TIMER B) - CPU CLK / 1024 - CPU CLK / 8192 - CPU CLK / 65536 - EXT INT $7C00 USER'S PROGRAM & DATA AREA $7FFF $2FFF DUMMY AREA $0600 USER'S PROGRAM & DATA AREA SUNPLUS TEST PROGRAM *MEMORY MAP (From ROM view) $0000 Hardware register, I/Os data logic_4 control OD : Open Drain 60K - I/O CONFIG $0000 $0001 *NMI SOURCE: - INTA (from TIMER A) Input/Output IOD port : IOD1 - IOD0 input data OD-PMOS or buffer output data logic_4 control OD : Open Drain 60K 6.5. I/O Port Configuration* Input/Output IOC port : IOC7 - IOC6 logic_2 control output data VDD 90K Note: * Values are for VDD = 5.0V test conditions only. 6.6. Power Saving Mode The SPC11A includes a power saving mode (Standby mode) for those applications that require very low standby current. To enter standby mode, the Wake-Up Register must be enabled and then buffer or OD-NMOS stop the CPU clock by writing the STOP CLOCK Register to enter standby mode. In such mode, RAM and I/Os will remain in their Port IOD(7, 6, 1, 0) is the previous states until being awaken. input data OD : Open Drain only wake-up source in the SPC11A. After the SPC11A is awaken, the internal CPU will go to the RESET State (Tw 65536 x T1) and continue to execute program. will not affect RAM nor I/Os (FIG.1). Wakeup Reset (c) Sunplus Technology Co., Ltd. Proprietary & Confidential 5 JUL. 09, 2001 Preliminary Version: 0.1 Preliminary SPC11A SLEEP T1 CPU CLK Wake-up RESET Tw FIG. 1 T1 = 1 / ( FCPU ), Tw 65536 x T1 6.7. Low Voltage Reset The SPC11A has a Low Voltage Reset (LVR) function. voltage drops below certain operating voltage. In general, design of Low Voltage Reset in SPC11A, it is able to reset all functions to the initial operational (stable) state if the VDD power-supply voltage drops below 1.3V or 2.7V (FIG.2). the CPU becomes unstable and malfunctions when the power With the unique T1 CPU CLK VDD 1.3V/ 2.7V T2 RESET T22 * T1 (The LVR function is the same as Power ON Reset or External Reset.) FIG. 2 Tw 6.8. Timer/Counter The SPC11A has two 12-bit timer/counters, TMA and TMB respectively. TMA can be specified as a timer or a counter, but In the timer mode, TMA and When timer rollovers from TMB can only be used as a timer. TMB are re-loaded up-counters. signal if the corresponding bit is enabled in the INT ENABLE Register. Suppose TMA is specified as a counter, users can After the counter has been reset it by loading #0 into the counter. time. activated, the value in the counter can also be read at the same The read instruction will not affect the value of the counter nor reset it. $0FFF to $0000, the carry (overflow) signal will make the user's preset value to be loaded into timer automatically and up-count again. At the same time, the carry signal will generate an INT Clock source of Timer/Counter can be selected as follows: Timer/Counter Clock Source TMA 12-BIT TIMER 12-BIT COUNTER CPU CLOCK (T) or T/4 T/64, T/8192, T/65536 or EXT CLK T or T/4 TMA only, select timer or counter Select T or T/4 6 JUL. 09, 2001 Preliminary Version: 0.1 TMB 12-BIT TIMER MODE SELECT REGISTER TIMER CLOCK SELECTOR (c) Sunplus Technology Co., Ltd. Proprietary & Confidential Preliminary SPC11A 6.9. Speech and Melody Since the SPC11A provides a large ROM and wide range of CPU operating speeds, it is the most suitable device for speech and melody synthesis. In speech synthesis, the SPC11A can use NMI for accurate sampling frequency. The user can store the speech data in ROM Several algorithms and play it back with realistic sound quality. PCM, LOG PCM, and ADPCM. In melody synthesis, the SPC11A provides a dual tone mode to obtain melodious music. After selecting the dual tone mode, the user only needs to program either TMA or TMB, or both TMA and TMB to generate expected frequency for each channel. into an interrupt service routine. tone output. The hardware will toggle the tone wave automatically without entering The user can create musical instruments or sound effects by simply controlling the envelope of are recommended for high fidelity and compression of sound: (c) Sunplus Technology Co., Ltd. Proprietary & Confidential 7 JUL. 09, 2001 Preliminary Version: 0.1 Preliminary SPC11A 7. ELECTRICAL SPECIFICATIONS 7.1. Absolute Maximum Ratings Characteristics Symbol Ratings DC Supply Voltage Input Voltage Range Operating Temperature Storage Temperature conditions see AC/DC Electrical Characteristics. V+ VIN TA TSTO < 7.0V -0.5V to V+ + 0.5V 0 to +60 -50 to +150 For normal operational Note: Stresses beyond those given in the Absolute Maximum Rating table may cause operational errors or damage to the device. 7.2. AC Characteristics (TA = 25) Characteristics Symbol Limit Min. Typ. Max. Unit Test Condition OSC Frequency FOSC2 - 2.0 4.0 4.0 6.0 MHz MHz VDD = 2.4V - 3.6V, for 2-battery VDD = 3.6V - 5.5V, for 3-battery 7.3. DC Characteristics (VDD = 3.0V, TA = 25C) Characteristics Symbol Limit Min. Typ. Max. Unit Test Condition Operating Voltage Operating Current Standby Current Audio output current Input High Level Input High Level(IOC2-1) Input Low Level Input Low Level (IOC2-1) Output High I (IOC, IOD) Output Sink I (IOC, IOD) Input Resistor (IOD) VDD IOP ISTBY IAUD VIH VIH VIL VIL IOH IOL RIN 2.4 2.0 1.6 -1.0 2.0 - 1.5 -1.5 100 3.6 2.0 2.0 0.8 1.1 - V mA A For 2-battery FCPU = 3.0MHz @ 3.0V, no load VDD = 3.0V VDD = 3.0V,one-channel VDD = 3.0V VDD = 3.0V VDD = 3.0V VDD = 3.0V VDD = 3.0V, VOH = 2.0V VDD = 3.0V, VOL = 0.8V Pull Low, VDD = 3.0V, VIN = VDD mA V V V V mA mA Kohm 7.4. DC Characteristics (VDD = 5.0V, TA = 25C) Characteristics Symbol Limit Min. Typ. Max. Unit Test Condition Operating Voltage Operating Current Standby Current Audio output current Input High Level Input High Level (IOC2-1) Input Low Level Input Low Level(IOC2-1) Output High I (IOC, IOD) Output Sink I (IOC, IOD) Input Resistor (IOD) (c) Sunplus Technology Co., Ltd. Proprietary & Confidential VDD IOP ISTBY IAUD VIH VIH VIL VIL IOH IOL RIN 3.6 3.0 2.0 -1.0 4.0 - 4.0 -3.0 60 8 5.5 5.0 2.0 0.8 1.6 - V mA A For 3-battery FCPU = 4.0MHz @ 5.0V, no load VDD = 5.0V VDD = 5.0V, one-channel VDD = 5.0V VDD = 5.0V VDD = 5.0V VDD = 5.0V VDD = 5.0V, VOH = 4.2V VDD = 5.0V, VOL = 0.8V Pull Low, VDD = 5.0V, VIN = VDD JUL. 09, 2001 Preliminary Version: 0.1 mA V V V V mA mA Kohm Preliminary SPC11A 8. APPLICATION CIRCUITS 8.1. Application Circuit 0.1 C1 (c) Sunplus Technology Co., Ltd. Proprietary & Confidential C3 220F VDD + C4 VDD TEST VSS 0.1 RESET IOC7 IOC6 IOC2 IOC1 RESET SPC11A ROSC IOD7 IOD6 IOD1 IOD0 0.1 680~ 1.5K 9 AUD C2 R3 8050 Q1 R2 VDD Speaker JUL. 09, 2001 Preliminary Version: 0.1 Preliminary SPC11A 8.2. Current Mode DAC Speaker Driver C1: 0.1 F ~ 1 F RB1: 680 ~ 1.5K 4 ~ 8 VDD RB1: 10K ~ 50K RB2: 820 ~ 1.5K C1: 0.1 F ~ 1 F VDD 32 ~ 64 AUD C1 RB1 8050 AUD RB2 RB1 8050 C1 Figure 1 VDD Figure 2 VDD RB1: 2K~10K; C1: 1 F~10 F RB2: ~1K; C2: ~0.1 F 4 ~ 64 C2 RB1: 2K~10K; C1: 1 F~10 F RB2: ~1K; C2: ~0.1 F RB1 4 ~ 8 Enable C2 AUD RB1 C1 8050 AUD 8050 RB2 RB2 C1 Figure 3 VDD Figure 4 Power RB1: ~ 360 (Vol) RB2: ~ 4.7 AUD 4 ~ 64 AUDP 3 2 6 LM386 220 F 5 7 + 8050 1N4148 RE1 RB1 RB1 20K 4 10 0.1 F 0.01 F Figure 5 Figure 6 Figure 1: The simplest CKT uses with low impedance speaker. It has high operation current, but low cost. Figure 2: It is the same as Figure 1 but a high impedance speaker is used. Figure 3: The CKT contains a low pass filter. It is capable of providing higher speech quality, but it takes higher operation current. Figure 4: Improved version of Figure 3. The standby current can be controlled by the enable pin. Figure 5: The current mirror mode. It is able to control the volume. In addition, it is more stable and has lower operation current than Figure 1-3. Figure 6: High quality, low operation current CKT, but more expensive. (c) Sunplus Technology Co., Ltd. Proprietary & Confidential 10 JUL. 09, 2001 Preliminary Version: 0.1 Preliminary SPC11A 9. PACKAGE/PAD LOCATIONS 9.1. PAD Assignment Chip Size: 1370m x 1280m This IC substrate should be connected to VSS Note1: Chip size included scribe line. Note2: The 0.1F capacitor between VDD and VSS should be placed to IC as close as possible. 9.2. Ordering Information Product Number Package Type SPC11A-nnnnV-C Note1: Code number (nnnnV) is assigned for customer. Note2: Code number (nnnn = 0000 - 9999); version (A = A - Z). Chip form (c) Sunplus Technology Co., Ltd. Proprietary & Confidential 11 JUL. 09, 2001 Preliminary Version: 0.1 Preliminary SPC11A 9.3. PAD Locations PAD No. PAD Name X Y 1 2 3 4 5 6 7 8 9 10 11 12 13 14 IOD0 IOD1 IOD6 IOD7 IOC7 IOC6 IOC2 IOC1 VDD VSS ROSC TEST RESET AUD -535 -411 -287 -163 -42 80 201 323 443 522 522 522 523 522 -479 -479 -479 -479 -479 -479 -479 -479 -479 -182 -62 58 178 298 (c) Sunplus Technology Co., Ltd. Proprietary & Confidential 12 JUL. 09, 2001 Preliminary Version: 0.1 Preliminary SPC11A 10. DISCLAIMER The information appearing in this publication is believed to be accurate. Integrated circuits sold by Sunplus Technology are covered by the warranty and patent indemnification provisions stipulated in the terms of sale only. SUNPLUS makes no warranty, express, statutory implied or by description regarding the information in this publication or FURTHERMORE, SUNPLUS MAKES NO WARRANTY OF regarding the freedom of the described chip(s) from patent infringement. prices at any time without notice. MERCHANTABILITY OR FITNESS FOR ANY PURPOSE. SUNPLUS reserves the right to halt production or alter the specifications and Accordingly, the reader is cautioned to verify that the data sheets and other information in this publication are current before placing orders. Products described herein are intended for use in normal commercial applications. Applications involving unusual environmental or reliability requirements, e.g. military equipment or medical life support equipment, are specifically not recommended without additional processing by SUNPLUS for such applications. Please note that application circuits illustrated in this document are for reference purposes only. (c) Sunplus Technology Co., Ltd. Proprietary & Confidential 13 JUL. 09, 2001 Preliminary Version: 0.1 Preliminary SPC11A 11. REVISION HISTORY Date Revision # Description Page JUL. 09, 2001 0.1 Original 14 (c) Sunplus Technology Co., Ltd. Proprietary & Confidential 14 JUL. 09, 2001 Preliminary Version: 0.1 |
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